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APT4M120K
1200V, 4A, 4.00 Max
N-Channel MOSFET
Power MOS 8TM is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability.
TO-220
APT4M120K Single die MOSFET
D G S
FEATURES
* Fast switching with low EMI/RFI * Low RDS(on) * Ultra low Crss for improved noise immunity * Low gate charge * Avalanche energy rated * RoHS compliant
TYPICAL APPLICATIONS
* PFC and other boost converter * Buck converter * Two switch forward (asymmetrical bridge) * Single switch forward * Flyback * Inverters
Absolute Maximum Ratings
Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25C Continuous Drain Current @ TC = 100C Pulsed Drain Current Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive
1
Ratings 4 3 15 30 310 2
Unit
A
V mJ A
Thermal and Mechanical Characteristics
Symbol PD RJC RCS TJ,TSTG TL WT Characteristic Total Power Dissipation @ TC = 25C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range Soldering Temperature for 10 Seconds (1.6mm from case) Package Weight 0.22 6.2 10 1.1 -55 0.11 150 300 Min Typ Max 225 0.56 Unit W C/W
C oz g in*lbf N*m
12-2006 050-8103 Rev A
Torque
Mounting Torque ( TO-220 Package), 6-32 or M3 screw
Microsemi Website - http://www.microsemi.com
Static Characteristics
Symbol
VBR(DSS) VBR(DSS)/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS IGSS
TJ = 25C unless otherwise specified
Test Conditions
VGS = 0V, ID = 250A Reference to 25C, ID = 250A VGS = 10V, ID = 2A VGS = VDS, ID = 1mA VDS = 1200V VGS = 0V TJ = 25C TJ = 125C
APT4M120K
Typ 1.41 3.32 4 -10 Max Unit V V/C V mV/C A nA
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-Source On Resistance
3
Min 1200
Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current
3
4.00 5 100 500 100
VGS = 30V
Dynamic Characteristics
Symbol
gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf
4
TJ = 25C unless otherwise specified
Test Conditions
VDS = 50V, ID = 2A VGS = 0V, VDS = 25V f = 1MHz
Parameter
Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related
Min
Typ 4.5 1385 17 100 40
Max
Unit S
pF
5
VGS = 0V, VDS = 0V to 800V
Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time
VGS = 0 to 10V, ID = 2A, VDS = 600V Resistive Switching VDD = 800V, ID = 2A RG = 4.7 6 , VGG = 15V
20 43 7 20 7.4 4.4 24 6.9
nC
ns
Source-Drain Diode Characteristics
Symbol
IS ISM VSD trr Qrr dv/dt
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Peak Recovery dv/dt
Test Conditions
MOSFET symbol showing the integral reverse p-n junction diode (body diode)
Min
D
Typ
Max 4
Unit A
G S
15 1.0 1150 16 10 V ns C V/ns
ISD = 2A, TJ = 25C, VGS = 0V ISD = 2A, VDD = 100V 3 diSD/dt = 100A/s, TJ = 25C ISD 2A, di/dt 1000A/s, VDD = 800V, TJ = 125C
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25C, L = 155.0mH, RG = 4.7, IAS = 2A. 3 Pulse test: Pulse Width < 380s, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -6.30E-8/VDS^2 + 7.65E-9/VDS + 1.09E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
050-8103
Rev A
12-2006
12 10 ID, DRAIN CURRENT (A) 8 6
V
GS
= 10V
4.0 3.5
APT4M120K
T = 125C
J
V
ID, DRIAN CURRENT (A)
TJ = -55C
GS
= 6, 7, 8 & 9V
3.0 2.5 2.0 1.5 1.0 0.5 0 0
4.5V
5V
TJ = 25C
4 2 0
TJ = 125C
TJ = 150C
30 25 20 15 10 5 0 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics
NORMALIZED TO VGS = 10V @ 2A
30 25 20 15 10 5 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
3.0 2.5 2.0 1.5 1.0 0.5
16 14 ID, DRAIN CURRENT (A) 12 10 8 6 4 2 0 0
VDS> ID(ON) x RDS(ON) MAX. 250SEC. PULSE TEST @ <0.5 % DUTY CYCLE
TJ = -55C TJ = 25C TJ = 125C
0 25 50 75 100 125 150 0 -55 -25 TJ, JUNCTION TEMPERATURE (C) Figure 3, RDS(ON) vs Junction Temperature 5
8 7 6 5 4 3 2 1 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics
Ciss
2,000 1,000
gfs, TRANSCONDUCTANCE
4
TJ = 25C TJ = 125C
C, CAPACITANCE (pF)
TJ = -55C
3
100
2
Coss
10
Crss
1
0
0
1.5 1.0 0.5 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current
ID = 2A
2.0
800 1000 1200 600 400 200 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage 0 16 ISD, REVERSE DRAIN CURRENT (A) 14 12 10 8 12-2006 050-8103 Rev A 6 4 2 0 0
TJ = 25C
TJ = 150C
1
16 VGS, GATE-TO-SOURCE VOLTAGE (V) 14 12 10 8 6 4 2
VDS = 240V
VDS = 600V
VDS = 960V
60 50 40 30 20 10 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage 0
0
1.2 1.0 0.8 0.6 0.4 0.2 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage
20 10 ID, DRAIN CURRENT (A)
20 10 ID, DRAIN CURRENT (A)
I
DM
APT4M120K
13s
I
DM
Rds(on)
13s
1
Rds(on)
100s
1ms
1
TJ = 150C TC = 25C
100s 1ms
10ms
100ms DC line
10ms
0.1
TJ = 125C TC = 75C
100ms
DC line
Scaling for Different Case & Junction Temperatures: ID = ID(T = 25C)*(TJ - TC)/125
1
10 100 1200 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area
0.1
C
10 100 1200 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area
1
TJ (C)
0.239 Dissipated Power (Watts) 0.0025 0.124
TC (C)
0.323 ZEXT are the external thermal impedances: Case to sink, sink to ambient, etc. Set to zero when modeling only the case to junction.
Figure 11, Transient Thermal Impedance Model 0.60 Z JC, THERMAL IMPEDANCE (C/W) 0.50 0.40 0.30 0.20 0.10 0
D = 0.9
0.7
0.5
ZEXT
Note:
PDM
t1 t2
0.3 SINGLE PULSE 0.1 0.05
Duty Factor D = 1/t2 Peak TJ = PDM x ZJC + TC
t1 = Pulse Duration
t
10-5
10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 12. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration
10-4
1.0
TO-220 (K) Package Outline
e3 100% Sn Plated
1.39 (.055) 0.51 (.020) 10.66 (.420) 9.66 (.380) 5.33 (.210) 4.83 (.190) 6.85 (.270) 5.85 (.230)
Drain
12.192 (.480) 9.912 (.390)
3.42 (.135) 2.54 (.100)
4.08 (.161) Dia. 3.54 (.139)
3.683 (.145) MAX.
12-2006
0.50 (.020) 0.41 (.016) 2.92 (.115) 2.04 (.080) 4.82 (.190) 3.56 (.140)
14.73 (.580) 12.70 (.500)
Gate Drain Source
1.77 (.070) 3-Plcs. 1.15 (.045)
1.01 (.040) 3-Plcs. 0.83 (.033) 2.79 (.110) 2.29 (.090) 5.33 (.210) 4.83 (.190)
050-8103
Rev A
Dimensions in Millimeters and (Inches)
Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved.

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